1. Field of the Invention
The present invention generally relates to electrically erasable and programmable semiconductor integrated memory devices, and more particularly to a block erasing type of electrically erasable and programmable semiconductor memory device.
2. Description of the Prior Art
A flash memory is an electrically erasable and programmable read only memory (EEPROM). A large quantity of data can be erased from the flash memory at the same time. In the early stage of the development of flash memories, pieces of data stored in all memory cells (bits) were simultaneously erased before programming even when it was required to change only some pieces of data. If only some pieces of data needed to be changed, it was necessary to save all of the other pieces of data in another memory. However, this procedure needs a longer time for programming as the integration density increases. Further, in practice, a large storage capacity is needed to save data which is not changed.
With the above in mind, a block erasing type of flash memory has been proposed in which the memory cell array is divided into blocks and only one or more necessary blocks are changed.
However, the conventional block erasing type of flash memories has the following disadvantages. The relationship between an external address applied to the flash memory and the memory cell is fixed. This means that one memory cell can be specified by one address value and cannot be accessed by any other address values. Hence, if an address specifying the same block is applied to the flash memory n times, the contents of the memory cells included in the specified block are changed n times. In this regard, there is a possibility that a particular block or a set of blocks is more frequently subjected to programming than other blocks. For example, some blocks have been programmed a large number of times, while other blocks have been programmed a small number of times. This may be also caused by the behavior of a program. Generally, flash memories can be repeatedly programmed in the range of 10,000 to 100,000 times. When the lifetime of a block has expired, the lifetime of the entire flash memory has expired even if the lifetimes of the other blocks have not expired.
With the above in mind, improved flash memories have been proposed in which the number of times that programming has been performed is monitored for each block. When programming has been carried out for a block a number of times greater than a threshold value, the correspondence between the external address and the memory cells is changed (see Japanese Laid-Open Patent Publication Nos. 63-200398 and 4-64998). Another improved flash memory has been proposed in which the beginning write position for programming is cyclically changed and tag information is used to specify the beginning of a series of pieces of data written into the flash memory (see Japanese Laid-Open Patent Publication No. 1-107400).
However, in practice, complex procedures are needed to achieve the above-mentioned proposed structures. Hence, the load on a system for controlling flash memories increases.